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Ji-Hoon Kim

2-1-2 Project Director

  • Affiliation Seoul Tech (Electrical and Information Engineering)
  • Tel +82-2-970-6444
  • E-mail

    jihoonkim@seoultech.ac.kr

  • Homepage

    http://www.cnucsa.com/

  • Research TopicCPU/DSP, Communication Modem, Low Power SoC Design for Security/Biomedical Systems
Project : Development of sensor interface SoC application system
Purpose For expanding sensor-based IoT (Internet of Things) market, low-power sensor interface SoC (System-on-Chip) technology will be investigated which can be used for various wireless sensor nodes. This includes the development of optimized signal analysis algorithms and hardware accelerator design. Also, low power techniques at various design levels are also investigated from architecture to circuit.
Contents Main object of the research is development of optimized signal analysis algorithms, which would support the improvement of sensor interface system performance. From algorithm to physical implementation, we will perform various optimizations at each level. Also, effective implementation of matrix arithmetic hardware accelerator and performance analysis with low power CPUs such as ARM Cortex-M processors are covered in this research. The one of the most important thing in implementation is low energy consumption which we will make every effort to optimize.
Expected Contribution With the research results, we can expect to gain supremacy over an expanding IoT (Internet of Things) market. Also, we can consider “technology transfer“ to
local companies.
Publication
No Title Year Phase
1 IEEE 802.15.4 호환 WPAN 기기를 위한 낮은 복잡도를 갖는 128-bit AES-CCM IP 설계 2015.03. Phase 2
2nd year
1
Patent
No Title Country Date Phase
1 순환 중복 검사 장치 및 방법 KR 2013-12-17 Phase 2
1st year
1
Conference
No title Conference Name Date Phase
1 High-Radix 병렬 터보디코딩을 위한 CRC 조기 중단 기법의 구현 SoC 학술대회 2014-05-16 Phase 2
1st year
1
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