3-4-7 Project Co-director
- Affiliation CISS
- Tel +82-42-350-8714
- Email email@example.com
- Research Topic CMOS Image Sensor (CIS)
Project : Development of a low power CMOS Image Sensor
A research target is to develop low power CIS, which can extend the operation time of battery-operated devices such as a portable device, a security camera, and a vehicle black box. Column parallel ADCs and CDS circuits that consume more than 60% will be designed with low power consumption.
An ADC and CDS circuit which consume the most power in CIS will be designed with a low power consumption, and peripheral circuits also would be optimized for lower power CIS. ○ Low power design of column parallel ADCs - An ADC suitable for high resolution and high speed operation will be designed and optimized for low power operation. ○ Low power design of CDS circuit - An analog CDS can be removed by using a digital CDS which eliminates a fixed pattern noise (FPN) and a reset noise effectively. ○ Low power design of pixel source follow amplifier - A source follow amplifier will be designed to operate with reduced static current for low power operation.. ○ Low power design of peripherals - Memory circuits which contains digitized output temporally and scan circuits including peripherals will be designed for low power operation.
A low power design technology which is developing through this research is a fundamental technology to reduce the power consumption of CIS. A low power CIS based on this technology has many application fields such as a portable device, a security camera, a vehicle black box, and a pole camera with a longer operation time, and also can prevent a degradation of image quality by heating.